FPGA Implementation of a Variable Precision CORDIC Processor

نویسندگان

  • E. Saez
  • J. Villalba
  • J. Hormigo
  • F. J. Quiles
  • J. I. Benavides
  • E. L. Zapata
چکیده

In this paper we present the FPGA implementation of a new word{serial CORDIC processor working with variable precision. It has been designed in such a way that it allows us to take advantage of the successive shifts in the coordinates involved in the CORDIC algorithm. This signiicatively reduces the total number of cycles required. Special attention has been paid to the design of the critical path to obtain an acceptable cycle time. The resulting FPGA device is able to work with a word length of 16 bits through 128 bits.

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تاریخ انتشار 1998